The present invention relates to a non-volatile semiconductor memory. More to particularly this invention relates to structure and manufacturing method of a memory cell of a flash memory.
FIG. 1 is a sectional view showing general former floating gate type semiconductor non-volatile memory. In the conventional example of the floating gate type semiconductor non-volatile memory as shown in FIG. 1, there is formed N-type source 9 and drain 10 on a memory cell region at a distance, such the memory cell region is isolated electrically from adjacent regions by means of a field insulating film 2 on the surface of P-type silicone substrate 1. A channel region 16 of the memory cell is formed at a region held between the drain and the source. There is formed a floating gate 4 on the channel region 16 through the first gate insulating film 3. There is formed a control gate 8 on the floating gate 4 through the second gate insulating film 7.
The conventional example of the floating gate type semiconductor non-volatile memory as shown in FIG. 1 is manufactured in such a way that it causes the field insulating film 2, the first gate insulating film 3, the channel region 16 and so forth to be formed on the silicon substrate 1, then accumulating poly-crystal silicon film of the whole surface of the substrate to be processed into the shape of the floating gate, subsequently, forming the floating gate 4, the drain 10, and source 9 respectively while introducing N-type impurity, then forming silicon oxide film due to heat oxidization at the surface thereof, thus forming the second gate insulating film 7 consisting of only the silicon oxide film or laminated film of silicon oxide film and silicon nitride film. Further, it causes the control gate 8 to be formed with the result that the floating gate type semiconductor non-volatile memory is formed.
Now, writing characteristic of the non-volatile memory is determined by the channel region of the first gate insulating film, the capacitive junction between the floating gates, the floating gate of the second gate insulating film, and the capacitive division in the capacitive junction between the control gates. Consequently, it is necessary to increase the capacitive junction between the floating gates of the second gate insulating film and the control gate.
In order to cope with the above-described matter, there is laid the floating gate on the field insulating film flatly. For this reason, it is difficult to make the floating gate type semiconductor non-volatile memory large capacitance.
FIG. 2A is a plan view showing a configuration of the conventional example. FIG. 2B is sectional view along line B-Bxe2x80x2 of FIG. 2A. As shown in FIGS. 2A and 2B, the floating gate type semiconductor non-volatile memory is constituted by the floating gate 17 formed on the semiconductor-substrate 1 through the first gate oxide film 3, and the control gate 8 which is subjected to capacitive junction in relation to the floating gate 17 through the second gate insulating film 7. There is developed structure in which there exists a concave shaped floating gate which is deeper than a regular concave shape formed while reflecting shape-of-substrates, there is formed the second gate insulating film at least on the inside surface of side wall of the concave shape of the floating gate.
However, it is necessary to increase the lithography process being in use for forming groove in order to process the floating gate 17 into the concave shape as shown in FIG. 2B. Further, it is necessary to make sure of dimensions between the inner parts of the side wall of the concave shaped floating gate more than the minimum dimensions of the photo lithography. For this reason, it becomes difficult to adjust respective shapes with each other (mis-alignment), thus dispersion of shapes of the floating gate occurs so that there occurs the problem of increasing dispersion of the capacitive junction. Furthermore, in order to avoid this problem, when it causes width of the floating gate to be increased, there is the problem that it becomes unsuitable for making the non-volatile memory large capacitance.
In view of the foregoing, it is an object of the present invention for resolving the above-mentioned problems to provide a non-volatile memory and a manufacturing method thereof which realizes low voltage and high speed operation while increasing junction capacitance between the control gate and the floating gate due to conformity of chemical-mechanical polishing technology and dry etching technology with the exception of increasing of cell area.
According to one aspect of the present invention to provide a non-volatile memory which is a floating gate type semiconductor nonvolatile memory consisting of a floating gate formed on a semiconductor-substrate through a first gate insulating film, and a control gate which is subjected to capacitive junction in relation to the floating gate through a second gate insulating film, the non-volatile memory comprises a floating gate of deeper concave shape than a regular concave shape which is formed on the semiconductor-substrate while reflecting the shape-of-substrates, and a second gate insulating film which is provided for at least on the inside surface of a concave shaped side wall of said floating gate.
According to another aspect of the present invention to provide a non-volatile memory in which the control gate is formed in specific configuration in relation to the direction of a groove of the concave shape in the floating gate, and the control gate is disposed on the inside of the concave shape.
According to another aspect of the present invention to provide a non-volatile memory in which the control gate is formed in parallel to the direction of the groove of the concave shape in the floating gate.
According to another aspect of the present invention to provide a non-volatile memory in which the control gate is formed in perpendicular to the direction of the groove of the concave shape in the floating gate.
According to another aspect of the present invention to provide a manufacturing method of a floating gate type semiconductor non-volatile memory consisting of a floating gate formed on a semiconductor-substrate through a first gate insulating film, and a control gate which is subjected to capacitive junction in relation to the floating gate through a second gate insulating film comprising the steps of forming the floating gate by amorphous silicon film, poly-crystal silicon film or combination thereof, and forming the floating gate into deeper concave shape than a regular concave shape which is formed on a semiconductor-substrate while reflecting shape-of-substrates by virtue of combination of chemical mechanical polishing technology and dry etching technology of silicon with the exception of combination of photolithography technology and the dry etching technology of the silicon.
As stated above, in a floating gate type semiconductor non-volatile memory (floating gate type memory cell) and manufacturing method thereof according to the present invention, there is formed shape of floating gate into concave shape in the self-adjustment way by virtue of adaptation of chemical mechanical polishing technology and dry etching technology with the exception that there is newly introduced lithography technology, then forming the second gate insulating film and the control gate along thereto, thereby enabling junction capacitance to be increased between the control gate and the floating gate, thus it causes low voltage and high speed operation to be possible.
The above and further objects and novel features of the invention will be more fully understood from the following detailed description when the same is read in connection with the accompanying drawings. It should be expressly understood, however, that the drawings are for purpose of illustration only and are not intended as a definition of the limits of the invention.